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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT
Description
The 74LVC1G125 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance state when a HIGH-level is applied to the output enable (OE) pin. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V
Pin Assignments
(Top View) OE A
1 2 4 5
Vcc
allowing this device to be used in a mixed voltage
GND 3
Y
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environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.
SOT25 / SOT353
(Top View) OE
1 6
Vcc NC Y
Features
* * * * * * Wide Supply Voltage Range from 1.65 to 5.5V 24mA Output Drive at 3.3V CMOS low power consumption IOFF Supports Partial-Power-Down Mode Operation Inputs accept up to 5.5V ESD Protection Tested per JESD 22 Exceeds 200-V Machine Model (A115-A) Exceeds 2000-V Human Body Model (A114-A) * * * * * Latch-Up Exceeds 100mA per JESD 78, Class II LatchUp Exceeds 100mA per JESD 78, Class II Range of Package Options Direct Interface with TTL Levels SOT25, SOT353, and DFN1410: Assembled with "Green" Molding Compound (no Br, Sb) Lead Free Finish/ RoHS Compliant (Note 1) * * * * *
A GND
2
5
3
4
DFN1410 (Note 2)
Applications
Voltage Level Shifting Bus Driver / Repeater Power Down Signal Isolation General Purpose Logic Wide array of products such as. o PCs, networking, notebooks, netbooks, PDAs o Computer peripherals, hard drives, CD/DVD ROM o TV, DVD, DVR, set top box o Cell Phones, Personal Navigation / GPS o MP3 players ,Cameras, Video Recorders
Notes:
1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at http://www.diodes.com/products/lead_free.html. 2. Pin 2 and pin 5 of the DFN1410 package are internally connected.
74LVC1G125
Document number: DS32202 Rev. 2 - 2
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT Pin Descriptions
Pin Name Description Output Enable Data Input Ground Data Output Supply Voltage No Connection
OE
A GND Y Vcc
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NC
Logic Diagram
1
OE
A
2
4
Y
Function Table
Inputs
OE L
Output A H L X Y H L Z
L H
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT Absolute Maximum Ratings (Note 3)
Symbol ESD HBM ESD MM VCC VI Vo Vo IIK IOK IO TJ TSTG
Notes:
Description Human Body Model ESD Protection Machine Model ESD Protection Supply Voltage Range Input Voltage Range Voltage applied to output in high impedance or IOFF state Voltage applied to output in high or low state Input Clamp Current VI<0 Output Clamp Current Continuous output current Continuous current through Vdd or GND Operating Junction Temperature Storage Temperature
Rating 2 200 -0.5 to 6.5 -0.5 to 6.5 -0.5 to 6.5 -0.3 to VCC +0.5 -50 -50 50 100 -40 to 150 -65 to 150
Unit KV V V V V V mA mA mA mA C C
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3. Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. These are stress values and device operation should be within recommend values.
74LVC1G125
Document number: DS32202 Rev. 2 - 2
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT Recommended Operating Conditions (Note 4)
Symbol VCC Operating Voltage Parameter Operating Data retention only VCC = 1.65V to 1.95V VIH High-level Input Voltage VCC = 2.3V to 2.7V VCC = 3V to 3.6V VCC = 4.5V to 5.5V VCC = 1.65V to 1.95V VIL Low-level input voltage VCC = 2.3V to 2.7V VCC = 3V to 3.6V VCC = 4.5V to 5.5V VI VO Input Voltage Output Voltage VCC = 1.65V VCC = 2.3V IOH High-level output current VCC = 3V VCC = 4.5V VCC = 1.65V VCC = 2.3V IOL Low-level output current VCC = 3V VCC = 4.5V t/V VCC = 1.8V 0.15V, 2.5V 0.2V Input transition rise or fall VCC = 3.3V 0.3V rate VCC = 5V 0.5V Operating free-air temperature 0 0 Min 1.65 1.5 0.65 X VCC 1.7 2 0.7 X VCC 0.35 X VCC 0.7 0.8 0.3 X VCC 5.5 VCC -4 -8 -16 -24 -32 4 8 16 24 32 20 10 5 -40 85 C ns/V mA mA V V V V Max 5.5 Unit V V
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TA
Notes:
4. Unused inputs should be held at Vcc or Ground.
74LVC1G125
Document number: DS32202 Rev. 2 - 2
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT Electrical Characteristics (All typical values are at Vcc = 3.3V, TA = 25C)
Over recommended free-air temperature range (unless otherwise noted) Symbol Parameter Test Conditions IOH = -100A IOH = -4mA VOH High Level Output Voltage IOH = -8mA IOH = -16mA IOH = -24mA IOH = -32mA IOL = 100A IOL = 4mA VOL High-level Input Voltage IOL = 8mA IOL = 16mA IOL = 24mA IOL = 32mA II IOFF IOZ ICC ICC Ci JA Input Current Power Down Leakage Current Z State Leakage Current Supply Current VI = 5.5V or GND VI or VO = 5.5V VO =0 to 5.5V VI = 5.5V of GND IO=0 Vcc 1.65V to 5.5V 1.65V 2.3V 3V 4.5V 1.65V to 5.5V 1.65V 2.3V 3V 4.5V 0 to 5.5V 0 3.6V 1.65V to 5.5V Min VCC - 0.1 1.2 1.9 2.4 2.3 3.8 0.1 0.45 0.3 0.4 0.55 0.55 5 10 10 10 A A A A A pF C/W o C/W o C/W o C/W o C/W o C/W
o
Typ.
Max
Unit
V
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V
JC
One input at VCC - Additional Supply Current 0.6 V Other inputs at VCC or GND Input Capacitance Vi = VCC - or GND SOT25 Thermal Resistance SOT353 Junction-to-Ambient DFN1410 SOT25 Thermal Resistance SOT353 Junction-to-Case DFN1410
3V to 5.5V 3.3 (Note 5) (Note 5) (Note 5) (Note 5) (Note 5) (Note 5) 4 204 371 430 52 143 190
500
Notes: 5. Test condition for SOT25, SOT353, and DFN1410: Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout.
74LVC1G125
Document number: DS32202 Rev. 2 - 2
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT Switching Characteristics
Over recommended free-air temperature range, CL = 15pF (see Figure 1) Vcc = 1.8 V Vcc = 2.5 V From TO 0.15V 0.2V Parameter (Input) (OUTPUT) Min Max Min Max tpd A Y 1.9 6.9 0.7 4.6
Vcc = 3.3 V 0.3V Min Max 0.6 3.7
Vcc = 5 V 0.5V Min Max 0.5 3.4
Unit ns
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Over recommended free-air temperature range, CL = 30 or 50pF as noted (see Figure 2) Vcc = 1.8 V Vcc = 2.5 V Vcc = 3.3 V From TO 0.15V 0.2V 0.3V Parameter (Input) (OUTPUT) Min Max Min Max Min Max tpd ten tdis A Y Y Y 2.8 2.8 1.3 9.0 10.1 9.2 1.2 1.5 1.0 5.5 6.6 5.5 1.0 1.0 1.0 4.5 5.3 5.5
Vcc = 5 V 0.5V Min Max 1.0 1.0 1.0 4.0 5.0 4.2
Unit ns ns ns
OE
OE
Operating Characteristics
TA = 25 C Parameter Outputs enabled f = 10 MHz Outputs disabled 2 2 3 4 Vcc = 1.8 V Test Conditions TYP 19 Vcc = 2.5 V TYP 19 Vcc = 3.3 V TYP 19 Vcc = 5 V TYP 21 pF Unit
Cpd
Power dissipation capacitance
74LVC1G125
Document number: DS32202 Rev. 2 - 2
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT Parameter Measurement Information
VLOAD Open GND
From Output Under Test
RL S1
CL
(see Note A)
RL
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH
S1 Open Vload GND
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Vcc 1.8V0.15V 2.5V0.2V 3.3V0.3V 5V0.5V VI VCC VCC 3V VCC
Inputs tr/tf 2ns 2ns 2.5ns 2.5ns
VM VCC/2 VCC/2 1.5V VCC/2
VLOAD 2 X VCC 2 X VCC 6V 2 X VCC
CL 15pF 15pF 15pF 15pF
RL 1M 1M 1M 1M
V 0.15V 0.15V 0.3V 0.3V
Voltage Waveform Pulse Duration
Voltage Waveform Enable and Disable Times Low and High Level Enabling
Voltage Waveform Propagation Delay Times Inverting and Non Inverting Outputs Figure 1. Load Circuit and Voltage Waveforms
Notes: A. Includes test lead and test apparatus capacitance. B. All pulses are supplied at pulse repetition rate 10 MHz. C. Inputs are measured separately one transition per measurement. D. tPLZ and tPHZ are the same as tdis. E. tPZL and tPZH are the same as tEN. F. tPLH and tPHL are the same as tPD.
74LVC1G125
Document number: DS32202 Rev. 2 - 2
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT Parameter Measurement Information (Continued)
From Output Under Test
RL S1
VLOAD Open GND
CL
(see Note A)
RL
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH
S1 Open Vload GND
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Vcc 1.8V0.15V 2.5V0.2V 3.3V0.3V 5V0.5V VI VCC VCC 3V VCC
Inputs tr/tf 2ns 2ns 2.5ns 2.5ns
VM VCC/2 VCC/2 1.5V VCC/2
VLOAD 2 X VCC 2 X VCC 6V 2 X VCC
CL 30pF 30pF 50pF 50pF
RL 1K 500 500 500
V 0.15V 0.15V 0.3V 0.3V
Voltage Waveform Pulse Duration
Voltage Waveform Enable and Disable Times Low and High Level Enabling
Voltage Waveform Propagation Delay Times Inverting and Non Inverting Outputs Figure 2. Load Circuit and Voltage Waveforms
Notes: A. Includes test lead and test apparatus capacitance. B. All pulses are supplied at pulse repetition rate 10 MHz. C. Inputs are measured separately one transition per measurement. D. tPLZ and tPHZ are the same as tdis. E. tPZL and tPZH are the same as tEN0 F. tPLH and tPHL are the same as tPD.
74LVC1G125
Document number: DS32202 Rev. 2 - 2
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT Ordering Information
74LVC1G 125 XXX - 7
Logic Device
74 : Logic Prefix LVC : 1.65 to 5.5V Family 1G : One gate
Function
125 : 3-State Buffer OE-Low
Package
W5 : SOT25 SE : SOT353 FZ4 : DFN1410
Packing
7 : Tape & Reel
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Device 74LVC1G125W5-7 74LVC1G125SE-7 74LVC1G125FZ4-7
Notes:
Package Code W5 SE FZ4
Packaging (Note 6) SOT25 SOT353 DFN1410
7" Tape and Reel Quantity Part Number Suffix 3000/Tape & Reel -7 3000/Tape & Reel -7 5000/Tape & Reel -7
6. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf.
74LVC1G125
Document number: DS32202 Rev. 2 - 2
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT Marking Information
(1) SOT25 and SOT353
(Top View)
5
4
7
XX Y W X
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1
2
3
XX : Identification code Y : Year 0~9 W : Week : A~Z : 1~26 week; a~z : 27~52 week; z represents 52 and 53 week X : A~Z : Internal code
Part Number 74LVC1G125W5 74LVC1G125SE
Package SOT25 SOT353
Identification Code UY UY
(2) DFN1410
(Top View) XX YWX XX : Identification Code Y : Year : 0~9 W : Week : A~Z : 1~26 week; a~z : 27~52 week; z represents 52 and 53 week X : A~Z : Internal code
Package DFN1410 Identification Code UY
Part Number 74LVC1G125FZ4
74LVC1G125
Document number: DS32202 Rev. 2 - 2
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT Package Outline Dimensions (All Dimensions in mm)
(1) Package Type: SOT25
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(2) Package Type: SOT353
6x-0.42 0.10/0.30
C L
C L
1.3
C L
1.15/1.35
2.0/2.2
2x-0.65 6x-0.60
C L
1.9
0.40/0.45
0.65Bsc.
C L
1.10Max.
0.9/1.0
Detail"A" 0.1/0.22
"A"
0/0.1
1.8/2.2
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Document number: DS32202 Rev. 2 - 2
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0/8
0.25/0.40
0.25
PIN 1
Land Pattern Recommendation (unit:mm) Top View
Gauge Plane
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT Package Outline Dimensions (Continued)
(3) Package Type: DFN1410
0.13Typ.
0.10 C
6x-
0.40Max.
0/0.05
0.08 C
Seating Plane 0.25 A 6x-0.35
Side View
C 6x-0.25
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2X-
A
0.50Typ. B 6x-0.25/0.35 0.075 O 0.030
0.550 4x-0.50Typ. Land Pattern Recommendation (mm)
1.35/1.45
0.95/1.05
(Pin #1 ID)
C0.
1x4
5X
Top View
2X-
0.25 B 0.10(4x) 6x-0.15/0.25 0.10 CAB
Bottom View
74LVC1G125
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT Taping Orientation (Note 7)
For DFN1410
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Notes:
7. The taping orientation of the other package type can be found on our website at http://www.diodes.com/datasheets/ap02007.pdf
74LVC1G125
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74LVC1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT
IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated website, harmless against all damages.
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Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application. Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks. LIFE SUPPORT Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body, or 2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user. B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness.
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright (c) 2010, Diodes Incorporated www.diodes.com
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